The Runtime Theory

Virtual Memory Mapping

Virtual memory mapping: VMAs, four-level page tables, demand paging, TLB caching, and PTE permission bits.

The Runtime Theory Team07 stages

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THE VIRTUALADDRESS SPACEVMA BOOKKEEPINGMULTI-LEVELPAGE TABLESMAPPINGSSTAY LAZYTLB CACHESTRANSLATIONSPERMISSION BITSUNMAP AND RECLAIM

readyEach process gets its own address space: text, data, heap, the mmap region, and the stack — all virtual addresses, none of which exist in physical RAM yet.

Virtual memory is a promise the kernel makes page-by-page. This diagram shows how a process's address space is constructed: VMAs define the regions, four-level page tables translate them, and nothing is physical until it has to be. The ordering walks from the address space map, through VMA bookkeeping, to the page-table walk, then shows demand paging — where mmap creates a mapping with no physical pages behind it, and first access faults them in. The TLB is the cache on top, and PTE permission bits are what make NX and read-only segments actually enforced. The done state is a mapping in full: every touched page has a PTE, cached translations live in the TLB, and untouched pages still cost nothing.