What is the difference between sequential consistency and acquire-release?

A strong answer

A strong candidate frames What is the difference between sequential consistency and acquire-release? around the exact memory layout, compiler semantics, and hardware execution model covered in Memory Consistency, Cache Contention, and C11 Atomics. Explain memory_order_seq_cst total ordering versus memory_order_acquire/release for synchronization without full ordering.

Up to this point, we have synchronized shared data using POSIX mutexes and read-write locks. Mutexes provide safety, but they introduce real costs:

• Even an uncontended mutex requires atomic instructions and memory barriers (~15–25 nanoseconds).
• Contended mutexes invoke kernel futex system calls, suspending threads and causing microsecond-scale context switch latency.
• Locks can cause priority inversion, convoying, and deadlocks.

In a single-threaded program, g_payload is written before g_ready. But when producer and consumer run on separate CPU cores on a multi-core machine, the consumer can print Payload: 0.

In a production interview, always connect the specification rule to its concrete runtime consequence: state what lives on the stack versus the heap or static storage segment, how the compiler or operating system validates alignments, lifetimes, and error codes, and what happens under adversarial or boundary inputs (such as zero-length buffers, integer overflow, concurrent mutation, or partial I/O). Backing your explanation with a small trace of register/memory state transitions immediately separates senior systems engineers from candidates who only memorized syntax.

What the interviewer is listening for

• Mastery of core invariant: Differentiate sequential consistency, acquire-release, and relaxed memory ordering models.
• Mastery of core invariant: Implement lock-free synchronization primitives using C11 atomic operations and compare-and-swap.
• Mastery of core invariant: Diagnose and eliminate cache-line false sharing using explicit 64-byte memory alignment.
• Hardware and ABI awareness: Explaining how sizes, alignments, calling conventions, or kernel boundaries behave on real 64-bit targets rather than relying on implementation-defined assumptions.
• Defensive engineering: Naming the exact compiler flags (-Wall -Wextra -Werror), static analyzers, or runtime sanitizers (-fsanitize=address,undefined,thread) that verify correctness in CI.

Common mistakes

• Explaining only surface syntax without tracing the underlying memory addresses, ownership lifetime, or kernel/user-space state transitions.
• Assuming undefined behavior (such as signed overflow, uninitialized reads, strict-aliasing violations, or dangling pointers) will "just work" because it passed an unoptimized -O0 debug build.
• Ignoring return codes, partial reads/writes, alignment padding, or cleanup paths when an allocation or syscall fails midway through a function.