Advanced · Module 7 · Lesson 7 of 8
Memory Consistency, Cache Contention, and C11 Atomics
Eliminate mutex overhead with C11 atomics, navigate sequential consistency versus acquire-release ordering, eliminate false sharing on cache lines, and prevent out-of-order memory hazards.
By the end you can
- Differentiate sequential consistency, acquire-release, and relaxed memory ordering models
- Implement lock-free synchronization primitives using C11 atomic operations and compare-and-swap
- Diagnose and eliminate cache-line false sharing using implementation-appropriate alignment
- Identify CPU store buffering and hardware reordering hazards resolved by memory barriers
01 · A question first
Why can two threads reading and writing completely independent variables on multi-core CPUs observe memory writes in an unexpected order? And why can two adjacent variables updated by different threads suffer severe cache contention?
Make a guess before you read on.
02 · The idea
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What's inside
- Start with the problem
- How the idea works
- Complete Implementation: Lock-Free Spinlock
- Why it is correct
- What it costs
- Pitfalls and variations
- Where it is used
03 · Practice
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