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Advanced · Module 9 · Lesson 6 of 13

Cache-Conscious Data Structures: Alignment, False Sharing, and Structure of Arrays

Structure C data layouts for CPU cache lines, eliminate multi-core false sharing with explicit alignment, and transform Array of Structures into Structure of Arrays for SIMD saturation.

Pro — members onlyAbout 16 minutes

By the end you can

  • Align structs to 64-byte cache line boundaries using alignas and posix_memalign
  • Eliminate multi-threaded false sharing and MESI bus invalidations using explicit padding
  • Transform Array of Structures (AoS) to Structure of Arrays (SoA) to maximize cache line utilization
  • Implement hybrid Array of Structures of Arrays (AoSoA) to balance vectorization with locality

Builds on Compiler Optimization Internals: Vectorization, Inlining, and Assembly Auditing.

01 · A question first

Why does an Array of Structures spend 87% of its memory bus bandwidth transferring data your CPU never reads, and how can reorganizing the exact same fields into parallel arrays make your processing loops run 6x faster while enabling automatic SIMD vectorization?

Make a guess before you read on.

02 · The idea

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What's inside

  • Start with the problem
  • How the idea works
  • Complete Working Benchmark: AoS vs. SoA vs. AoSoA
  • Why it is correct
  • What it costs
  • Pitfalls and variations
  • Where it is used

03 · Practice

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